Chiplet-based Hardware Architectures for Software-defined Vehicles

The CHASSIS initiative represents a strategic leap forward in automotive compute platform design for Software-Defined Vehicles (SDVs). The project focuses primarily on pioneering chiplet-based architectures to overcome the limitations of traditional monolithic System-on-Chips (SoCs). Ultimately, we aim to redefine how automotive electronics are developed, integrated, and deployed across vehicle segments.

Mission

Our mission is to enable scalable, high-performance computing platforms for SDVs through innovative chiplet-based architectures. By introducing a flexible, modular approach to semiconductor design, CHASSIS aims to empower automotive manufacturers with tailored solutions, accelerate the transition to software-defined mobility, and foster competitive innovation within the industry.

Vision

CHASSIS envisions a future where European technological sovereignty in automotive semiconductor innovation is restored and secured. We are working to build a multi-vendor chiplet ecosystem that offers unparalleled architectural flexibility and ensures readily available, automotive-grade compute platforms, free from the constraints of proprietary solutions and consumer electronics-focused SoCs

Impact

CHASSIS is making a profound impact by enabling scalable compute architectures that meet diverse performance needs and thus accelerating the shift to software-defined mobility. We are fostering competitive innovation by opening up the high-performance compute market, ensuring architectural flexibility for E/E designs, and ultimately solidifying Europe’s position at the forefront of advanced automotive computing.

Outcomes

Automotive Base Die (ABD)

The core of the chiplet ecosystem will simplify integration and provide OEMs with greater flexibility. 

Virtual/Hybrid Reference Platform

Early hardware/software co-validation will accelerate development and reduce risk.  

Multi-Vendor Chiplet Integration Framework

Demonstrates true interoperability, which will eliminate vendor lock-in and foster collaboration.

Test Chip & Reference Board:

Comprising multiple chiplets, this packaged SoC will demonstrate the viability of automotive chiplets, thus building confidence in the technology and driving industry-wide adoption. 

Automotive-Grade Software Stack

Purpose-built for safety-critical SDVs, it will ensure compliance and reliability. 

In-Vehicle Demonstrator

Real-world validation that builds trust and showcases readiness for deployment in series vehicles. 

News

Members

United for European
technological sovereignty

The project team comprises European heavyweights from industry and research.

This diversity brings a wealth of perspectives and expertise to the project.

The project partners include 3 major OEMs, 1 automotive supplier, 7 semiconductor
and 2 software players, 1 EDA technology provider, as well as 4 research institutions

START

2025

DURATION

3 years

PARTNERS

18

Partners

Scalable, high-performance computing platforms for SDVs through innovative chiplet-based architectures

Dissemination

A growing resource of publication, articles, case studies and media kits

Interested?
Find out more

Contact the CHASSIS project team to discuss the project, our partners or mission.

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